#pragma once #include namespace esphome { namespace ads131m08 { static constexpr size_t MAX_FRAME_SIZE = 10; // in frame_words. If frame is above this size something must have gone wrong enum ADC_DRDY_STATE : uint8_t { DS_LOGIC_HIGH = 0, // DEFAULT DS_HI_Z = 1 }; enum ADC_POWERMODE : uint16_t { PM_VERY_LOW_POWER = 0, PM_LOW_POWER = 1, PM_HIGH_RESOLUTION = 2, // DEFAULT PM_HIGH_RESOLUTION2 = 3, }; enum ADC_PGA_GAIN : uint8_t { PGA_1 = 0, PGA_2 = 1, PGA_4 = 2, PGA_8 = 3, PGA_16 = 4, PGA_32 = 5, PGA_64 = 6, PGA_128 = 7, PGA_INVALID }; enum ADC_INPUT_CHANNEL_MUX : uint8_t { ICM_AIN0P_AIN0N = 0, // DEFAULT ICM_INPUT_SHORTED = 1, ICM_POSITIVE_DC_TEST_SIGNAL = 2, ICM_NEGATIVE_DC_TEST_SIGNAL = 3, }; enum ADC_OVERSAMPLING_RATIO : uint16_t { OSR_128 = 0, OSR_256 = 1, OSR_512 = 2, OSR_1024 = 3, // default OSR_2048 = 4, OSR_4096 = 5, OSR_8192 = 6, OSR_16256 = 7 }; enum ADC_WAIT_TIME : uint16_t { WT_128 = 856, WT_256 = 1112, WT_512 = 1624, WT_1024 = 2648, WT_2048 = 4696, WT_4096 = 8792, WT_8192 = 16984, WT_16384 = 33368 }; // delays in microseconds enum ADC_DELAY { T_REGACQ = 5, }; static constexpr uint16_t MODE_MASK_RESET_HAPPENED = ~0x0400; // DEFAULT static constexpr uint16_t MODE_RESET_HAPPENED = 0x0400; enum ADC_CRC: uint16_t { CRC_TYPE_CCITT = 0x0000, // DEFAULT CRC type CRC_TYPE_ANSI = 0x0800, CRC_REC_ENABLE = 0x1000, CRC_REG_ENABLE = 0x2000, }; static constexpr uint16_t WLENGTH_16_BITS = 0x0000; static constexpr uint16_t WLENGTH_24_BITS = 0x0100; // DEFAULT static constexpr uint16_t WLENGTH_32_BITS_LSB_ZERO_PADDING = 0x0200; static constexpr uint16_t WLENGTH_32_BITS_MSB_SIGN_EXTEND = 0x0300; enum ADC_TIMEOUT : uint16_t { TIMEOUT_DISABLED = 0x0000, TIMEOUT_ENABLED = 0x0010 // DEFAULT }; enum ADC_DRDY_SELECTION : uint16_t { DRDY_SEL_MOST_LAGGING = 0x0000, // DEFAULT DRDY_SEL_LOGICAL_OR = 0x0004, DRDY_SEL_MOST_LEADING_CHAN = 0x0008, DRDY_SEL_MOST_LEADING_CHAN2 = 0x000C }; static constexpr uint16_t DRDY_FMT_LEVEL = 0x0000; // Logic low (default) static constexpr uint16_t DRDY_FMT_PULSE = 0x0001; // Low pulse with a fixed duration // Commands enum ADC_COMMANDS : uint16_t { CMD_NULL = 0x0000, // No operation; used to read STATUS register CMD_RESET = 0x0011, // RESET the device CMD_STANDBY = 0x0022, // Place the device into standby mode CMD_WAKEUP = 0x0033, // Wake up device from standby mode to conversion mode CMD_LOCK = 0x0555, // Lock the interface such that only the NULL, UNLOCK, and RREG commands are valid CMD_UNLOCK = 0x0655, // Unlock the interface after the interface is locked CMD_RREG = 0xA000, // Read register command base; number of registers to read added to lower byte; register address // to upper byte CMD_WREG = 0x6000, // Write register command base; number of registers to write added to lower byte; register address // to upper byte }; // Responses enum ADC_RESPONSES : uint16_t { RSP_RESET_OK = 0xFF28, RSP_RESET_NOK = 0x0011 }; // Used to generalise register config addresses enum REGRELADDR : uint16_t { REG_CHX_CFG, REG_CHX_OCAL_MSB, REG_CHX_OCAL_LSB, REG_CHX_GCAL_MSB, REG_CHX_GCAL_LSB, }; // enum ADC_REG : uint16_t { static constexpr uint16_t REG_ID = 0x00; static constexpr uint16_t REG_STATUS = 0x01; static constexpr uint16_t REG_MODE = 0x02; static constexpr uint16_t REG_CLOCK = 0x03; static constexpr uint16_t REG_GAIN1 = 0x04; static constexpr uint16_t REG_GAIN2 = 0x05; static constexpr uint16_t REG_CFG = 0x06; static constexpr uint16_t REG_THRSHLD_MSB = 0x07; static constexpr uint16_t REG_THRSHLD_LSB = 0x08; static constexpr uint16_t REG_CH0_CFG = 0x09; static constexpr uint16_t REG_CH0_OCAL_MSB = 0x0A; static constexpr uint16_t REG_CH0_OCAL_LSB = 0x0B; static constexpr uint16_t REG_CH0_GCAL_MSB = 0x0C; static constexpr uint16_t REG_CH0_GCAL_LSB = 0x0D; static constexpr uint16_t REG_CH1_CFG = 0x0E; static constexpr uint16_t REG_CH1_OCAL_MSB = 0x0F; static constexpr uint16_t REG_CH1_OCAL_LSB = 0x10; static constexpr uint16_t REG_CH1_GCAL_MSB = 0x11; static constexpr uint16_t REG_CH1_GCAL_LSB = 0x12; static constexpr uint16_t REG_CH2_CFG = 0x13; static constexpr uint16_t REG_CH2_OCAL_MSB = 0x14; static constexpr uint16_t REG_CH2_OCAL_LSB = 0x15; static constexpr uint16_t REG_CH2_GCAL_MSB = 0x16; static constexpr uint16_t REG_CH2_GCAL_LSB = 0x17; static constexpr uint16_t REG_CH3_CFG = 0x18; static constexpr uint16_t REG_CH3_OCAL_MSB = 0x19; static constexpr uint16_t REG_CH3_OCAL_LSB = 0x1A; static constexpr uint16_t REG_CH3_GCAL_MSB = 0x1B; static constexpr uint16_t REG_CH3_GCAL_LSB = 0x1C; static constexpr uint16_t REG_CH4_CFG = 0x1D; static constexpr uint16_t REG_CH4_OCAL_MSB = 0x1E; static constexpr uint16_t REG_CH4_OCAL_LSB = 0x1F; static constexpr uint16_t REG_CH4_GCAL_MSB = 0x20; static constexpr uint16_t REG_CH4_GCAL_LSB = 0x21; static constexpr uint16_t REG_CH5_CFG = 0x22; static constexpr uint16_t REG_CH5_OCAL_MSB = 0x23; static constexpr uint16_t REG_CH5_OCAL_LSB = 0x24; static constexpr uint16_t REG_CH5_GCAL_MSB = 0x25; static constexpr uint16_t REG_CH5_GCAL_LSB = 0x26; static constexpr uint16_t REG_CH6_CFG = 0x27; static constexpr uint16_t REG_CH6_OCAL_MSB = 0x28; static constexpr uint16_t REG_CH6_OCAL_LSB = 0x29; static constexpr uint16_t REG_CH6_GCAL_MSB = 0x2A; static constexpr uint16_t REG_CH6_GCAL_LSB = 0x2B; static constexpr uint16_t REG_CH7_CFG = 0x2C; static constexpr uint16_t REG_CH7_OCAL_MSB = 0x2D; static constexpr uint16_t REG_CH7_OCAL_LSB = 0x2E; static constexpr uint16_t REG_CH7_GCAL_MSB = 0x2F; static constexpr uint16_t REG_CH7_GCAL_LSB = 0x30; static constexpr uint16_t REGMAP_CRC = 0x3E; // }; // Mask READ/WRITE_REG static constexpr uint16_t MASK_CMD_RW_REG = 0xE000; static constexpr uint16_t MASK_CMD_RW_REG_ADDRESS = 0x1F80; static constexpr uint16_t MASK_CMD_RW_REG_COUNT = 0x007F; static constexpr uint16_t MASK_CMD_RW_REG_RESP = 0xE000; // WRITE_REG resp static constexpr uint16_t WREG_RESP = 0x4000; // mask first with MASK_CMD_RW_REG_RESP // READ_REG resp static constexpr uint16_t RREG_RESP = 0xE000; // mask first with MASK_CMD_RW_REG_RESP // Mask Register STATUS static constexpr uint16_t MASK_STATUS_LOCK = 0x8000; static constexpr uint16_t MASK_STATUS_RESYNC = 0x4000; static constexpr uint16_t MASK_STATUS_REGMAP = 0x2000; static constexpr uint16_t MASK_STATUS_CRC_ERR = 0x1000; static constexpr uint16_t MASK_STATUS_CRC_TYPE = 0x0800; static constexpr uint16_t MASK_STATUS_RESET = 0x0400; static constexpr uint16_t MASK_STATUS_WLENGTH = 0x0300; static constexpr uint16_t MASK_STATUS_DRDY7 = 0x0080; static constexpr uint16_t MASK_STATUS_DRDY6 = 0x0040; static constexpr uint16_t MASK_STATUS_DRDY5 = 0x0020; static constexpr uint16_t MASK_STATUS_DRDY4 = 0x0010; static constexpr uint16_t MASK_STATUS_DRDY3 = 0x0008; static constexpr uint16_t MASK_STATUS_DRDY2 = 0x0004; static constexpr uint16_t MASK_STATUS_DRDY1 = 0x0002; static constexpr uint16_t MASK_STATUS_DRDY0 = 0x0001; static constexpr uint16_t MASK_STATUS_DRDY = 0x00FF; // Mask Register MODE static constexpr uint16_t MASK_MODE_REG_CRC_EN = 0x2000; static constexpr uint16_t MASK_MODE_RX_CRC_EN = 0x1000; static constexpr uint16_t MASK_MODE_CRC_TYPE = 0x0800; static constexpr uint16_t MASK_MODE_RESET = 0x0400; static constexpr uint16_t MASK_MODE_WLENGTH = 0x0300; static constexpr uint16_t MASK_MODE_TIMEOUT = 0x0010; static constexpr uint16_t MASK_MODE_DRDY_SEL = 0x000C; static constexpr uint16_t MASK_MODE_DRDY_HiZ = 0x0002; static constexpr uint16_t MASK_MODE_DRDY_FMT = 0x0001; // Mask Register CLOCK static constexpr uint16_t MASK_CLOCK_CH7 = 0x8000; static constexpr uint16_t MASK_CLOCK_CH6 = 0x4000; static constexpr uint16_t MASK_CLOCK_CH5 = 0x2000; static constexpr uint16_t MASK_CLOCK_CH4 = 0x1000; static constexpr uint16_t MASK_CLOCK_CH3 = 0x0800; static constexpr uint16_t MASK_CLOCK_CH2 = 0x0400; static constexpr uint16_t MASK_CLOCK_CH1 = 0x0200; static constexpr uint16_t MASK_CLOCK_CH0 = 0x0100; static constexpr uint16_t MASK_CLOCK_ALLCH = 0xFF00; static constexpr uint16_t MASK_CLOCK_ALLCH_OFF = 0x00FF; static constexpr uint16_t MASK_CLOCK_XTAL_DIS = 0x0080; static constexpr uint16_t MASK_CLOCK_EXTREF_EN = 0x0040; static constexpr uint16_t MASK_CLOCK_OSR = 0x001C; static constexpr uint16_t MASK_CLOCK_PWR = 0x0003; static constexpr uint16_t MASK_CLOCK_ALL_CH_ENABLE = 0xFF00; // Mask Register GAIN static constexpr uint16_t MASK_GAIN_PGAGAIN7 = 0x7000; static constexpr uint16_t MASK_GAIN_PGAGAIN6 = 0x0700; static constexpr uint16_t MASK_GAIN_PGAGAIN5 = 0x0070; static constexpr uint16_t MASK_GAIN_PGAGAIN4 = 0x0007; static constexpr uint16_t MASK_GAIN_PGAGAIN3 = 0x7000; static constexpr uint16_t MASK_GAIN_PGAGAIN2 = 0x0700; static constexpr uint16_t MASK_GAIN_PGAGAIN1 = 0x0070; static constexpr uint16_t MASK_GAIN_PGAGAIN0 = 0x0007; // Mask Register CFG static constexpr uint16_t MASK_CFG_GC_DLY = 0x1E00; static constexpr uint16_t MASK_CFG_GC_EN = 0x0100; static constexpr uint16_t MASK_CFG_CD_ALLCH = 0x0080; static constexpr uint16_t MASK_CFG_CD_NUM = 0x0070; static constexpr uint16_t MASK_CFG_CD_LEN = 0x000E; static constexpr uint16_t MASK_CFG_CD_EN = 0x0001; // Mask Register THRSHLD_MSB - dummy, for completeness static constexpr uint16_t MASK_THRSHLD_MSB_CD_TH_MSB = 0xFFFF; // Mask Register THRSHLD_LSB static constexpr uint16_t MASK_THRSHLD_LSB_CD_TH_LSB = 0xFF00; static constexpr uint16_t MASK_THRSHLD_LSB_DCBLOCK = 0x000F; // Mask Register CHX_CFG static constexpr uint16_t MASK_CHX_CFG_PHASE = 0xFFC0; static constexpr uint16_t MASK_CHX_CFG_DCBLKX_DIS = 0x0004; static constexpr uint16_t MASK_CHX_CFG_MUX = 0x0003; // Mask Register CHX_OCAL_MSB - dummy, for completeness static constexpr uint16_t MASK_CHX_OCAL_MSB = 0xFFFF; // Mask Register CHX_OCAL_LSB static constexpr uint16_t MASK_CHX_OCAL_LSB = 0xFF00; // Mask Register CHX_GCAL_MSB static constexpr uint16_t MASK_CHX_GCAL_MSB = 0xFFFF; // Mask Register CHX_GCAL_LSB static constexpr uint16_t MASK_CHX_GCAL_LSB = 0xFF00; // -------------------------------------------------------------------- // Conversion modes static constexpr uint16_t CONVERSION_MODE_CONT = 0; static constexpr uint16_t CONVERSION_MODE_SINGLE = 1; // Data Format static constexpr uint16_t DATA_FORMAT_TWO_COMPLEMENT = 0; static constexpr uint16_t DATA_FORMAT_BINARY = 1; // Measure Mode static constexpr uint8_t MEASURE_UNIPOLAR = 1; static constexpr uint8_t MEASURE_BIPOLAR = 0; // Clock Type static constexpr uint8_t CLOCK_EXTERNAL = 1; static constexpr uint8_t CLOCK_INTERNAL = 0; // PGA Gain // static constexpr uint16_t PGA_GAIN_1 = 0; // static constexpr uint16_t PGA_GAIN_2 = 1; // static constexpr uint16_t PGA_GAIN_4 = 2; // static constexpr uint16_t PGA_GAIN_8 = 3; // static constexpr uint16_t PGA_GAIN_16 = 4; // static constexpr uint16_t PGA_GAIN_32 = 5; // static constexpr uint16_t PGA_GAIN_64 = 6; // static constexpr uint16_t PGA_GAIN_128 = 7; // Input Filter static constexpr uint16_t FILTER_SYNC = 0; static constexpr uint16_t FILTER_FIR = 2; static constexpr uint16_t FILTER_FIR_IIR = 3; // Data Mode static constexpr uint8_t DATA_MODE_24BITS = 0; static constexpr uint8_t DATA_MODE_32BITS = 1; // Data Rate static constexpr uint8_t DATA_RATE_0 = 0; static constexpr uint8_t DATA_RATE_1 = 1; static constexpr uint8_t DATA_RATE_2 = 2; static constexpr uint8_t DATA_RATE_3 = 3; static constexpr uint8_t DATA_RATE_4 = 4; static constexpr uint8_t DATA_RATE_5 = 5; static constexpr uint8_t DATA_RATE_6 = 6; static constexpr uint8_t DATA_RATE_7 = 7; static constexpr uint8_t DATA_RATE_8 = 8; static constexpr uint8_t DATA_RATE_9 = 9; static constexpr uint8_t DATA_RATE_10 = 10; static constexpr uint8_t DATA_RATE_11 = 11; static constexpr uint8_t DATA_RATE_12 = 12; static constexpr uint8_t DATA_RATE_13 = 13; static constexpr uint8_t DATA_RATE_14 = 14; static constexpr uint8_t DATA_RATE_15 = 15; // Sync Mpdes static constexpr uint16_t SYNC_CONTINUOUS = 1; static constexpr uint16_t SYNC_PULSE = 0; // DIO Config Mode static constexpr uint8_t DIO_OUTPUT = 1; static constexpr uint8_t DIO_INPUT = 0; static constexpr uint8_t SPI_MASTER_DUMMY = 0xFF; static constexpr uint16_t SPI_MASTER_DUMMY16 = 0xFFFF; static constexpr uint32_t SPI_MASTER_DUMMY32 = 0xFFFFFFFF; // end of from datasheet static constexpr size_t BYTE_BITLENGTH = 8; // uint8/int8 static constexpr size_t WORD_BITLENGTH = 16; // uint16/int16 static constexpr size_t DWORD_BITLENGTH = 32; // uint32/int32/float static constexpr size_t QWORD_BITLENGTH = 64; // uint64/int64/float64 } // namespace ads131m08 } // namespace esphome