398 lines
13 KiB
C++
398 lines
13 KiB
C++
#pragma once
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#include <cstdint>
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namespace esphome {
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namespace ads131m08 {
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static constexpr size_t MAX_FRAME_SIZE =
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10; // in frame_words. If frame is above this size something must have gone wrong
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enum ADC_DRDY_STATE : uint8_t {
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DS_LOGIC_HIGH = 0, // DEFAULT
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DS_HI_Z = 1
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};
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// no shift
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enum ADC_POWERMODE : uint16_t {
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VERY_LOW_POWER = 0,
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LOW_POWER = 1,
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HIGH_RESOLUTION = 2, // DEFAULT
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HIGH_RESOLUTION2 = 3,
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};
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enum ADC_PGA_GAIN : uint8_t {
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PGA_1 = 0,
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PGA_2 = 1,
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PGA_4 = 2,
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PGA_8 = 3,
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PGA_16 = 4,
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PGA_32 = 5,
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PGA_64 = 6,
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PGA_128 = 7,
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PGA_INVALID
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};
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enum ADC_INPUT_CHANNEL_MUX : uint8_t {
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ICM_AIN0P_AIN0N = 0, // DEFAULT
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ICM_INPUT_SHORTED = 1,
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ICM_POSITIVE_DC_TEST_SIGNAL = 2,
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ICM_NEGATIVE_DC_TEST_SIGNAL = 3,
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};
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// must be shifted << 2
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enum ADC_OVERSAMPLING_RATIO : uint16_t {
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OSR_128 = 0,
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OSR_256 = 1,
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OSR_512 = 2,
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OSR_1024 = 3,
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OSR_2048 = 4,
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OSR_4096 = 5,
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OSR_8192 = 6,
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OSR_16256 = 7
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};
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enum ADC_SETTLING_TIME : uint16_t {
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T_SETTLE_OSR128 = 856,
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T_SETTLE_OSR256 = 1112,
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T_SETTLE_OSR512 = 1624,
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T_SETTLE_OSR1024 = 2648,
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T_SETTLE_OSR2048 = 4696,
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T_SETTLE_OSR4096 = 8792,
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T_SETTLE_OSR8192 = 16984,
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T_SETTLE_OSR16384 = 33368,
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};
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// delays in microseconds
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enum ADC_DELAY {
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T_REGACQ = 5,
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};
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enum ADC_CRC: uint16_t {
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CRC_TYPE_CCITT = 0x0000, // DEFAULT CRC type
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CRC_TYPE_ANSI = 0x0800,
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CRC_REC_ENABLE = 0x1000,
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CRC_REG_ENABLE = 0x2000,
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};
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enum ADC_TIMEOUT : uint16_t {
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TIMEOUT_DISABLED = 0x0000,
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TIMEOUT_ENABLED = 0x0010 // DEFAULT
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};
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enum ADC_DRDY_SELECTION : uint16_t {
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DRDY_SEL_MOST_LAGGING = 0x0000, // DEFAULT
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DRDY_SEL_LOGICAL_OR = 0x0004,
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DRDY_SEL_MOST_LEADING_CHAN = 0x0008,
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DRDY_SEL_MOST_LEADING_CHAN2 = 0x000C
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};
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// Commands
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enum ADC_COMMANDS : uint16_t {
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CMD_NULL = 0x0000, // No operation; used to read STATUS register
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CMD_RESET = 0x0011, // RESET the device
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CMD_STANDBY = 0x0022, // Place the device into standby mode
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CMD_WAKEUP = 0x0033, // Wake up device from standby mode to conversion mode
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CMD_LOCK = 0x0555, // Lock the interface such that only the NULL, UNLOCK, and RREG commands are valid
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CMD_UNLOCK = 0x0655, // Unlock the interface after the interface is locked
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CMD_RREG = 0xA000, // Read register command base; number of registers to read added to lower byte; register address
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// to upper byte
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CMD_WREG = 0x6000, // Write register command base; number of registers to write added to lower byte; register address
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// to upper byte
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};
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// Responses
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enum ADC_RESPONSES : uint16_t {
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RSP_RESET_OK = 0xFF28,
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RSP_RESET_NOK = 0x0011
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};
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enum ADC_GLOBAL_CHOP_DELAY : uint16_t {
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GC_DEL2,
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GC_DEL4,
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GC_DEL8,
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GC_DEL16, // default
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GC_DEL32,
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GC_DEL64,
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GC_DEL128,
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GC_DEL256,
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GC_DEL512,
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GC_DEL1024,
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GC_DEL2048,
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GC_DEL4096,
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GC_DEL8192,
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GC_DEL16384,
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GC_DEL32768,
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GC_DEL65536,
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};
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enum ADC_CURRENT_DETECT_NUMBER : uint16_t {
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CD_NUM1, // default
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CD_NUM2,
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CD_NUM4,
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CD_NUM8,
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CD_NUM16,
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CD_NUM32,
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CD_NUM64,
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CD_NUM128,
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};
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enum ADC_CURRENT_DETECT_LENGTH : uint16_t {
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CD_LEN128, // default
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CD_LEN256,
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CD_LEN512,
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CD_LEN768,
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CD_LEN1280,
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CD_LEN1792,
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CD_LEN2560,
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CD_LEN3584,
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};
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// Used to generalise register config addresses
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enum REGRELADDR : uint16_t {
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REG_CHX_CFG,
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REG_CHX_OCAL_MSB,
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REG_CHX_OCAL_LSB,
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REG_CHX_GCAL_MSB,
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REG_CHX_GCAL_LSB,
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};
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static constexpr uint16_t MODE_MASK_RESET_CLEAR = ~0x0400;
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static constexpr uint16_t MODE_RESET_HAPPENED = 0x0400;
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static constexpr uint16_t WLENGTH_16_BITS = 0x0000;
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static constexpr uint16_t WLENGTH_24_BITS = 0x0100; // DEFAULT
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static constexpr uint16_t WLENGTH_32_BITS_LSB_ZERO_PADDING = 0x0200;
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static constexpr uint16_t WLENGTH_32_BITS_MSB_SIGN_EXTEND = 0x0300;
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static constexpr uint16_t DRDY_FMT_LEVEL = 0x0000; // Logic low (default)
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static constexpr uint16_t DRDY_FMT_PULSE = 0x0001; // Low pulse with a fixed duration
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static constexpr uint16_t REG_ID = 0x00;
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static constexpr uint16_t REG_STATUS = 0x01;
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static constexpr uint16_t REG_MODE = 0x02;
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static constexpr uint16_t REG_CLOCK = 0x03;
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static constexpr uint16_t REG_GAIN1 = 0x04;
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static constexpr uint16_t REG_GAIN2 = 0x05;
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static constexpr uint16_t REG_CFG = 0x06;
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static constexpr uint16_t REG_THRSHLD_MSB = 0x07;
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static constexpr uint16_t REG_THRSHLD_LSB = 0x08;
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static constexpr uint16_t REG_CH0_CFG = 0x09;
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static constexpr uint16_t REG_CH0_OCAL_MSB = 0x0A;
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static constexpr uint16_t REG_CH0_OCAL_LSB = 0x0B;
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static constexpr uint16_t REG_CH0_GCAL_MSB = 0x0C;
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static constexpr uint16_t REG_CH0_GCAL_LSB = 0x0D;
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static constexpr uint16_t REG_CH1_CFG = 0x0E;
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static constexpr uint16_t REG_CH1_OCAL_MSB = 0x0F;
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static constexpr uint16_t REG_CH1_OCAL_LSB = 0x10;
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static constexpr uint16_t REG_CH1_GCAL_MSB = 0x11;
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static constexpr uint16_t REG_CH1_GCAL_LSB = 0x12;
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static constexpr uint16_t REG_CH2_CFG = 0x13;
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static constexpr uint16_t REG_CH2_OCAL_MSB = 0x14;
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static constexpr uint16_t REG_CH2_OCAL_LSB = 0x15;
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static constexpr uint16_t REG_CH2_GCAL_MSB = 0x16;
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static constexpr uint16_t REG_CH2_GCAL_LSB = 0x17;
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static constexpr uint16_t REG_CH3_CFG = 0x18;
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static constexpr uint16_t REG_CH3_OCAL_MSB = 0x19;
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static constexpr uint16_t REG_CH3_OCAL_LSB = 0x1A;
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static constexpr uint16_t REG_CH3_GCAL_MSB = 0x1B;
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static constexpr uint16_t REG_CH3_GCAL_LSB = 0x1C;
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static constexpr uint16_t REG_CH4_CFG = 0x1D;
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static constexpr uint16_t REG_CH4_OCAL_MSB = 0x1E;
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static constexpr uint16_t REG_CH4_OCAL_LSB = 0x1F;
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static constexpr uint16_t REG_CH4_GCAL_MSB = 0x20;
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static constexpr uint16_t REG_CH4_GCAL_LSB = 0x21;
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static constexpr uint16_t REG_CH5_CFG = 0x22;
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static constexpr uint16_t REG_CH5_OCAL_MSB = 0x23;
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static constexpr uint16_t REG_CH5_OCAL_LSB = 0x24;
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static constexpr uint16_t REG_CH5_GCAL_MSB = 0x25;
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static constexpr uint16_t REG_CH5_GCAL_LSB = 0x26;
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static constexpr uint16_t REG_CH6_CFG = 0x27;
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static constexpr uint16_t REG_CH6_OCAL_MSB = 0x28;
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static constexpr uint16_t REG_CH6_OCAL_LSB = 0x29;
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static constexpr uint16_t REG_CH6_GCAL_MSB = 0x2A;
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static constexpr uint16_t REG_CH6_GCAL_LSB = 0x2B;
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static constexpr uint16_t REG_CH7_CFG = 0x2C;
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static constexpr uint16_t REG_CH7_OCAL_MSB = 0x2D;
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static constexpr uint16_t REG_CH7_OCAL_LSB = 0x2E;
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static constexpr uint16_t REG_CH7_GCAL_MSB = 0x2F;
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static constexpr uint16_t REG_CH7_GCAL_LSB = 0x30;
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static constexpr uint16_t REGMAP_CRC = 0x3E;
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// Mask READ/WRITE_REG
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static constexpr uint16_t MASK_CMD_RW_REG = 0xE000;
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static constexpr uint16_t MASK_CMD_RW_REG_ADDRESS = 0x1F80;
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static constexpr uint16_t MASK_CMD_RW_REG_COUNT = 0x007F;
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static constexpr uint16_t MASK_CMD_RW_REG_RESP = 0xE000;
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// WRITE_REG resp
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static constexpr uint16_t WREG_RESP = 0x4000; // mask first with MASK_CMD_RW_REG_RESP
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// READ_REG resp
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static constexpr uint16_t RREG_RESP = 0xE000; // mask first with MASK_CMD_RW_REG_RESP
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// Mask Register STATUS
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static constexpr uint16_t MASK_STATUS_LOCK = 0x8000;
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static constexpr uint16_t MASK_STATUS_RESYNC = 0x4000;
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static constexpr uint16_t MASK_STATUS_REGMAP = 0x2000;
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static constexpr uint16_t MASK_STATUS_CRC_ERR = 0x1000;
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static constexpr uint16_t MASK_STATUS_CRC_TYPE = 0x0800;
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static constexpr uint16_t MASK_STATUS_RESET = 0x0400;
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static constexpr uint16_t MASK_STATUS_WLENGTH = 0x0300;
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static constexpr uint16_t MASK_STATUS_DRDY7 = 0x0080;
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static constexpr uint16_t MASK_STATUS_DRDY6 = 0x0040;
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static constexpr uint16_t MASK_STATUS_DRDY5 = 0x0020;
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static constexpr uint16_t MASK_STATUS_DRDY4 = 0x0010;
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static constexpr uint16_t MASK_STATUS_DRDY3 = 0x0008;
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static constexpr uint16_t MASK_STATUS_DRDY2 = 0x0004;
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static constexpr uint16_t MASK_STATUS_DRDY1 = 0x0002;
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static constexpr uint16_t MASK_STATUS_DRDY0 = 0x0001;
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static constexpr uint16_t MASK_STATUS_DRDY = 0x00FF;
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// Mask Register MODE
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static constexpr uint16_t MASK_MODE_REG_CRC_EN = 0x2000;
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static constexpr uint16_t MASK_MODE_RX_CRC_EN = 0x1000;
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static constexpr uint16_t MASK_MODE_CRC_TYPE = 0x0800;
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static constexpr uint16_t MASK_MODE_RESET = 0x0400;
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static constexpr uint16_t MASK_MODE_WLENGTH = 0x0300;
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static constexpr uint16_t MASK_MODE_TIMEOUT = 0x0010;
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static constexpr uint16_t MASK_MODE_DRDY_SEL = 0x000C;
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static constexpr uint16_t MASK_MODE_DRDY_HiZ = 0x0002;
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static constexpr uint16_t MASK_MODE_DRDY_FMT = 0x0001;
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// Mask Register CLOCK
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static constexpr uint16_t MASK_CLOCK_CH7 = 0x8000;
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static constexpr uint16_t MASK_CLOCK_CH6 = 0x4000;
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static constexpr uint16_t MASK_CLOCK_CH5 = 0x2000;
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static constexpr uint16_t MASK_CLOCK_CH4 = 0x1000;
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static constexpr uint16_t MASK_CLOCK_CH3 = 0x0800;
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static constexpr uint16_t MASK_CLOCK_CH2 = 0x0400;
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static constexpr uint16_t MASK_CLOCK_CH1 = 0x0200;
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static constexpr uint16_t MASK_CLOCK_CH0 = 0x0100;
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static constexpr uint16_t MASK_CLOCK_ALLCH = 0xFF00;
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static constexpr uint16_t MASK_CLOCK_ALLCH_OFF = 0x00FF;
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static constexpr uint16_t MASK_CLOCK_XTAL_DIS = 0x0080;
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static constexpr uint16_t MASK_CLOCK_EXTREF_EN = 0x0040;
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static constexpr uint16_t MASK_CLOCK_OSR = 0x001C;
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static constexpr uint16_t MASK_CLOCK_PWR = 0x0003;
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static constexpr uint16_t MASK_CLOCK_ALL_CH_ENABLE = 0xFF00;
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// Mask Register GAIN
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static constexpr uint16_t MASK_GAIN_PGAGAIN7 = 0x7000;
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static constexpr uint16_t MASK_GAIN_PGAGAIN6 = 0x0700;
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static constexpr uint16_t MASK_GAIN_PGAGAIN5 = 0x0070;
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static constexpr uint16_t MASK_GAIN_PGAGAIN4 = 0x0007;
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static constexpr uint16_t MASK_GAIN_PGAGAIN3 = 0x7000;
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static constexpr uint16_t MASK_GAIN_PGAGAIN2 = 0x0700;
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static constexpr uint16_t MASK_GAIN_PGAGAIN1 = 0x0070;
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static constexpr uint16_t MASK_GAIN_PGAGAIN0 = 0x0007;
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// Mask Register CFG
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static constexpr uint16_t MASK_CFG_GC_DLY = 0x1E00;
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static constexpr uint16_t MASK_CFG_GC_EN = 0x0100;
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static constexpr uint16_t MASK_CFG_CD_ALLCH = 0x0080;
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static constexpr uint16_t MASK_CFG_CD_NUM = 0x0070;
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static constexpr uint16_t MASK_CFG_CD_LEN = 0x000E;
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static constexpr uint16_t MASK_CFG_CD_EN = 0x0001;
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// Mask Register THRSHLD_MSB - dummy, for completeness
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static constexpr uint16_t MASK_THRSHLD_MSB_CD_TH_MSB = 0xFFFF;
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// Mask Register THRSHLD_LSB
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static constexpr uint16_t MASK_THRSHLD_LSB_CD_TH_LSB = 0xFF00;
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static constexpr uint16_t MASK_THRSHLD_LSB_DCBLOCK = 0x000F;
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// Mask Register CHX_CFG
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static constexpr uint16_t MASK_CHX_CFG_PHASE = 0xFFC0;
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static constexpr uint16_t MASK_CHX_CFG_DCBLKX_DIS = 0x0004;
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static constexpr uint16_t MASK_CHX_CFG_MUX = 0x0003;
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// Mask Register CHX_OCAL_MSB - dummy, for completeness
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static constexpr uint16_t MASK_CHX_OCAL_MSB = 0xFFFF;
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// Mask Register CHX_OCAL_LSB
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static constexpr uint16_t MASK_CHX_OCAL_LSB = 0xFF00;
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// Mask Register CHX_GCAL_MSB
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static constexpr uint16_t MASK_CHX_GCAL_MSB = 0xFFFF;
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// Mask Register CHX_GCAL_LSB
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static constexpr uint16_t MASK_CHX_GCAL_LSB = 0xFF00;
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// --------------------------------------------------------------------
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// Conversion modes
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static constexpr uint16_t CONVERSION_MODE_CONT = 0;
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static constexpr uint16_t CONVERSION_MODE_SINGLE = 1;
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// Data Format
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static constexpr uint16_t DATA_FORMAT_TWO_COMPLEMENT = 0;
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static constexpr uint16_t DATA_FORMAT_BINARY = 1;
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// Measure Mode
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static constexpr uint8_t MEASURE_UNIPOLAR = 1;
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static constexpr uint8_t MEASURE_BIPOLAR = 0;
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// Clock Type
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static constexpr uint8_t CLOCK_EXTERNAL = 1;
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static constexpr uint8_t CLOCK_INTERNAL = 0;
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// PGA Gain
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// static constexpr uint16_t PGA_GAIN_1 = 0;
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// static constexpr uint16_t PGA_GAIN_2 = 1;
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// static constexpr uint16_t PGA_GAIN_4 = 2;
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// static constexpr uint16_t PGA_GAIN_8 = 3;
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// static constexpr uint16_t PGA_GAIN_16 = 4;
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// static constexpr uint16_t PGA_GAIN_32 = 5;
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// static constexpr uint16_t PGA_GAIN_64 = 6;
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// static constexpr uint16_t PGA_GAIN_128 = 7;
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// Input Filter
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static constexpr uint16_t FILTER_SYNC = 0;
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static constexpr uint16_t FILTER_FIR = 2;
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static constexpr uint16_t FILTER_FIR_IIR = 3;
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// Data Mode
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static constexpr uint8_t DATA_MODE_24BITS = 0;
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static constexpr uint8_t DATA_MODE_32BITS = 1;
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// Data Rate
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static constexpr uint8_t DATA_RATE_0 = 0;
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static constexpr uint8_t DATA_RATE_1 = 1;
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static constexpr uint8_t DATA_RATE_2 = 2;
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static constexpr uint8_t DATA_RATE_3 = 3;
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static constexpr uint8_t DATA_RATE_4 = 4;
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static constexpr uint8_t DATA_RATE_5 = 5;
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static constexpr uint8_t DATA_RATE_6 = 6;
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static constexpr uint8_t DATA_RATE_7 = 7;
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static constexpr uint8_t DATA_RATE_8 = 8;
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static constexpr uint8_t DATA_RATE_9 = 9;
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static constexpr uint8_t DATA_RATE_10 = 10;
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static constexpr uint8_t DATA_RATE_11 = 11;
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static constexpr uint8_t DATA_RATE_12 = 12;
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static constexpr uint8_t DATA_RATE_13 = 13;
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static constexpr uint8_t DATA_RATE_14 = 14;
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static constexpr uint8_t DATA_RATE_15 = 15;
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// Sync Modes
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static constexpr uint16_t SYNC_CONTINUOUS = 1;
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static constexpr uint16_t SYNC_PULSE = 0;
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// DIO Config Mode
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static constexpr uint8_t DIO_OUTPUT = 1;
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static constexpr uint8_t DIO_INPUT = 0;
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static constexpr uint8_t SPI_MASTER_DUMMY = 0xFF;
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static constexpr uint16_t SPI_MASTER_DUMMY16 = 0xFFFF;
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static constexpr uint32_t SPI_MASTER_DUMMY32 = 0xFFFFFFFF;
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// end of from datasheet
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static constexpr size_t BYTE_BITLENGTH = 8; // uint8/int8
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static constexpr size_t WORD_BITLENGTH = 16; // uint16/int16
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static constexpr size_t DWORD_BITLENGTH = 32; // uint32/int32/float
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static constexpr size_t QWORD_BITLENGTH = 64; // uint64/int64/float64
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} // namespace ads131m08
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} // namespace esphome
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